瀏覽 的方式: 作者 Wang, Chua-Chin
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題名 | 作者 | 日期 |
Robust Reference Clock Generator Design for DDR Synchronous Devices | Wang, Chua-Chin; Tseng, Yih-Long; Chen, Chi-Wen | 2006-10-13T09:37:14Z |
Robust Reference Clock Generator Design for DDR Synchronous Devices | Wang, Chua-Chin; Tseng, Yih-Long; Chen, Chi-Wen | 2006-10-18T10:56:21Z |
Universal Current Integration Module IC Design For Smart Battery Management Of Mobile Handsets | Wang, Chua-Chin; Hsueh, Ya-Hsin; Tseng, Yi-Long; Huang, Shau-Guo | 2006-10-30T01:24:57Z |