完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Huang, Tai-Yi | |
dc.contributor.author | Huang, Kuang-Li | |
dc.contributor.author | Chung, Yeh-ching | |
dc.date.accessioned | 2009-08-23T04:40:56Z | |
dc.date.accessioned | 2020-05-25T06:41:35Z | - |
dc.date.available | 2009-08-23T04:40:56Z | |
dc.date.available | 2020-05-25T06:41:35Z | - |
dc.date.issued | 2006-10-13T08:36:59Z | |
dc.date.submitted | 2002-12-18 | |
dc.identifier.uri | http://dspace.lib.fcu.edu.tw/handle/2377/1238 | - |
dc.description.abstract | The integer linear programming method has been used to bound the performance of a program in a hard-real-time embedded system. The maximum value of the cost function of a program under a set of linear constraints on the execution count of each instructiom is an upper bound of the worst-case execution time of the program. In this paper we extend this method to bound the execution time of a program executed on a dynamic architecture where the execution time of each instruction depends on not only itself but also its adjacent instruction. Our method follows the control flow of the program iteratively to determine the set of all possible execution times of each instruction and construct a set of linear constrains on their execution counts. We demonstrate the capability of this method on an architecture where a processor has an instruction cache and an instruction pipeline, and cycle-stealing DMA I/O is concurrently executing. We conducted extensive simulations on a widely-used embedded microprocessor. The experimental results show that our method safely and tightly bounds the worst-case execution time of a program executed on such an architecture. | |
dc.description.sponsorship | 東華大學,花蓮縣 | |
dc.format.extent | 21P. | |
dc.format.extent | 250430 bytes | |
dc.format.mimetype | application/pdf | |
dc.language.iso | zh_TW | |
dc.relation.ispartofseries | 2002 ICS會議 | |
dc.subject | integer linear programming | |
dc.subject | hard-real-time system | |
dc.subject | embedded system | |
dc.subject | worst-case execution time | |
dc.subject | cycle-stealing DMA I/O | |
dc.title | An Iterative Integer Linear Programming Method for Bounding Program Performance on Embedded Systems | |
分類: | 2002年 ICS 國際計算機會議 |
文件中的檔案:
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ce07ics002002000003.PDF | 244.56 kB | Adobe PDF | 檢視/開啟 |
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