On the Array Embeddings and Layout of Quadtrees and Pyramids

Abstract

Quadtree and pyramid architectures have attracted considerable attention in recent years. They are being applied, on an increasing basis, to the fields of digital image and signal processing. Consequently, efficient embedding of these architectures in VLSI arrays has become an important research topic. In this paper, we propose three schemes to embed either quadtrees or pyramids in rectangular-, hexagonal-, or octagonal-connected mesh, using three different cell shapes for VLSI layout. Our analyses show that the best achievable node utilization is 67% when embedding either of these architectures in an octagonal-connected mesh. This result outperforms the best utilization recorded in literature by 25%. Our study also indicates that, among the various cell shapes attempted, the octagonal cell gives the best area utilization and the required routing space.