完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.author | Wang, Chua-Chin | |
| dc.contributor.author | Chen, Tian-Hwa | |
| dc.contributor.author | Hu, Ron | |
| dc.date.accessioned | 2009-08-23T04:41:15Z | |
| dc.date.accessioned | 2020-05-25T06:37:50Z | - |
| dc.date.available | 2009-08-23T04:41:15Z | |
| dc.date.available | 2020-05-25T06:37:50Z | - |
| dc.date.issued | 2006-10-16T01:54:15Z | |
| dc.date.submitted | 2002-12-18 | |
| dc.identifier.uri | http://dspace.lib.fcu.edu.tw/handle/2377/1368 | - |
| dc.description.abstract | A nobel voltage generator using 4 clocks with two different phase is presented in this work to provide a high voltage supply required by FLASH memories during programming mode and erase mode operations. Both the positive and negative polarities of the voltage are generated to serve as the programming voltage and the erase voltage, respectively. The proposed design is carried out by gated pass transistors and switched capacitors. The regulated generated voltages which the proposed desogn can provide is +11.7V and -11.6V given VOD = 2.5V when the circuit is implemented by TSMC 0.25 um 1P5M CMOS technology. The maximum power dissipation is estimated to be 3.8 mW given 12.5 MHz clocks. | |
| dc.description.sponsorship | 東華大學,花蓮縣 | |
| dc.format.extent | 13p. | |
| dc.format.extent | 248791 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.language.iso | zh_TW | |
| dc.relation.ispartofseries | 2002 ICS會議 | |
| dc.subject | FLASH | |
| dc.subject | high voltage generator | |
| dc.subject | BVG | |
| dc.subject | two-phase clocking | |
| dc.subject | switched capacitor | |
| dc.subject | memory wordline | |
| dc.subject.other | Computer Systems | |
| dc.title | A Dual-Polarity High Voltage Generator for FLASH Memories Using Two-Phase Clocking | |
| 分類: | 2002年 ICS 國際計算機會議 | |
文件中的檔案：
| 檔案 | 描述 | 大小 | 格式 | |
|---|---|---|---|---|
| ce07ics002002000008.PDF | 242.96 kB | Adobe PDF | 檢視/開啟 |
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