完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.author | Jeong, Cheoljoo | |
| dc.contributor.author | Kim, Youngchan | |
| dc.contributor.author | Oh, Youngbae | |
| dc.date.accessioned | 2009-08-23T04:39:52Z | |
| dc.date.accessioned | 2020-05-25T06:27:06Z | - |
| dc.date.available | 2009-08-23T04:39:52Z | |
| dc.date.available | 2020-05-25T06:27:06Z | - |
| dc.date.issued | 2006-10-17T08:15:38Z | |
| dc.date.submitted | 1998-12-17 | |
| dc.identifier.uri | http://dspace.lib.fcu.edu.tw/handle/2377/1786 | - |
| dc.description.abstract | Bisimulation equivalence is one of the most important equivalence relations that capture the notion of behavioral equivalence of concurrent systems. In this paper we present a randomized parallel implementation of the Kanellakis-Smolka algorithm that tests the bisimilarity of two finite CCS specificationis in O(n) time with O(n2)CRCW processors. | |
| dc.description.sponsorship | 成功大學,台南市 | |
| dc.format.extent | 6p. | |
| dc.format.extent | 446447 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.language.iso | zh_TW | |
| dc.relation.ispartofseries | 1998 ICS會議 | |
| dc.subject.other | Parallel Algorithms | |
| dc.title | A faster parallel implementation of the kanellakis-smolka algorithm for bisimilarity checking | |
| 分類: | 1998年 ICS 國際計算機會議 | |
文件中的檔案：
| 檔案 | 描述 | 大小 | 格式 | |
|---|---|---|---|---|
| ce07ics001998000031.pdf | 435.98 kB | Adobe PDF | 檢視/開啟 |
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