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dc.contributor.authorLiu, Yueh-Hung
dc.contributor.authorChen, Chang-Jiu
dc.date.accessioned2009-08-23T04:39:46Z
dc.date.accessioned2020-05-25T06:26:23Z-
dc.date.available2009-08-23T04:39:46Z
dc.date.available2020-05-25T06:26:23Z-
dc.date.issued2006-10-18T08:27:15Z
dc.date.submitted1998-12-17
dc.identifier.urihttp://dspace.lib.fcu.edu.tw/handle/2377/1905-
dc.description.abstractBranch instruction can interrupt the steady flow of instruction stream in the pipeline. To resolve this problem, various branch prediction schemes have been proposed and some of thess schemes can achieve high prediction accuracy. However, there is a fact that accuracy of branch target prediction is usually not as high as the accuracy of branch direction prediction.
dc.description.sponsorship成功大學,台南市
dc.format.extent8p.
dc.format.extent697482 bytes
dc.format.mimetypeapplication/pdf
dc.language.isozh_TW
dc.relation.ispartofseries1998 ICS會議
dc.subject.otherComputer Architecture
dc.titleImproving Branch Target Prediction with Register References
分類:1998年 ICS 國際計算機會議

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