完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.author | Shieh, Ruey-Pyng | |
| dc.contributor.author | Chen, Chang-JIU | |
| dc.date.accessioned | 2009-08-23T04:39:50Z | |
| dc.date.accessioned | 2020-05-25T06:26:48Z | - |
| dc.date.available | 2009-08-23T04:39:50Z | |
| dc.date.available | 2020-05-25T06:26:48Z | - |
| dc.date.issued | 2006-10-18T08:46:40Z | |
| dc.date.submitted | 1998-12-17 | |
| dc.identifier.uri | http://dspace.lib.fcu.edu.tw/handle/2377/1907 | - |
| dc.description.abstract | The gap between CPU and memory becomes larger and larger so that the performance of CPU may be degraded due to latency of memory. Therefore, it is very important to improve the performance of memory system. In this paper, we pay our attention on hardware prefetching. | |
| dc.description.sponsorship | 成功大學,台南市 | |
| dc.format.extent | 7p. | |
| dc.format.extent | 497341 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.language.iso | zh_TW | |
| dc.relation.ispartofseries | 1998 ICS會議 | |
| dc.subject.other | Computer Architecture | |
| dc.title | The Study and Improvement of Instruction and Data Prefetching | |
| 分類: | 1998年 ICS 國際計算機會議 | |
文件中的檔案：
| 檔案 | 描述 | 大小 | 格式 | |
|---|---|---|---|---|
| ce07ics001998000025.pdf | 485.68 kB | Adobe PDF | 檢視/開啟 |
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