Coverage Evaluation for Test Programs of X86 Compatible Microprocessors

Abstract

We propose a coverage tool for X86 compatible microprocessors that can evaluate the coverage of test programs according to a coverage model we built. Some existing coverage evaluation tools use the design code tracing method. This method needs the behavior model of a target design. We evaluate the coverage of test programs by analyzing test programs directly using the test program tracing method. Our approach just needs to know the architecture of a microprocessor, such as its instruction set, function units, pipeline stages, and data cache organiazation, etc. Experimenttal results show that using our coverage evaluation tool can use a smaller number of test programs to achieve higher coverage.