完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chung, Lan-Mao | |
dc.contributor.author | Pean, Der-Lin | |
dc.contributor.author | Chen, Cheng | |
dc.date.accessioned | 2009-06-02T06:21:56Z | |
dc.date.accessioned | 2020-05-25T06:37:35Z | - |
dc.date.available | 2009-06-02T06:21:56Z | |
dc.date.available | 2020-05-25T06:37:35Z | - |
dc.date.issued | 2006-10-26T03:33:58Z | |
dc.date.submitted | 2000-12-08 | |
dc.identifier.uri | http://dspace.lib.fcu.edu.tw/handle/2377/2604 | - |
dc.description.abstract | The F-COMA system is designed to reduce memory access latencies of the NUMA systems while program working sets exceed the size of its cache. However,there are still many memory access overheads in it. We proposed several effective mechanisms to reduce these overheads. Two migratory sharing optimization mechanisms are presented to decrease the superfluous memory requests incurred by migratory accesses. We also use invalidation cache to omit the unnecessary AM accesses. On the other hand, we use cluster-base F-COMA to increase AM utilization and reduce memory access misses. Finally, we combine these methods to improve the performance of F-COMA. Based on our evaluation results, our combined methods seep up the total performance about 39% in average under SPLASH benchmarks | |
dc.description.sponsorship | 中正大學,嘉義縣 | |
dc.format.extent | 8p. | |
dc.format.extent | 310389 bytes | |
dc.format.mimetype | application/pdf | |
dc.language.iso | zh_TW | |
dc.relation.ispartofseries | 2000 ICS會議 | |
dc.subject.other | Parallel Architecture | |
dc.title | Effective Techniques to Reduce Memory Access Latency for F-COMA Multiprocessor | |
分類: | 2000年 ICS 國際計算機會議 |
文件中的檔案:
檔案 | 描述 | 大小 | 格式 | |
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ce07ics002000000055.pdf | 303.11 kB | Adobe PDF | 檢視/開啟 |
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