完整後設資料紀錄
| DC 欄位 | 值 | 語言 |
|---|---|---|
| dc.contributor.author | Hsiao, Yi-Hsin | |
| dc.contributor.author | Yang, Chao-Tung | |
| dc.contributor.author | Tseng, Shian-Shyong | |
| dc.date.accessioned | 2009-08-23T04:38:51Z | |
| dc.date.accessioned | 2020-05-25T06:26:35Z | - |
| dc.date.available | 2009-08-23T04:38:51Z | |
| dc.date.available | 2020-05-25T06:26:35Z | - |
| dc.date.issued | 2006-10-30T01:30:56Z | |
| dc.date.submitted | 1996-12-19 | |
| dc.identifier.uri | http://dspace.lib.fcu.edu.tw/handle/2377/2840 | - |
| dc.description.abstract | In this paper we implement a robust parallelism detector for CONVEX SPP-1000 shared-memory multiprocessor system. The parallelism detector is improved by combining the PPD and K-Test that both are our previous research results. The detector can extract the available parallelism on loop of a program and translate the original program into parallel form by using CONVEX compiler directive. Then, the result program can be run on CONVEX SPP-1000 system to achieve high speedup rates. | |
| dc.description.sponsorship | 中山大學,高雄市 | |
| dc.format.extent | 8p. | |
| dc.format.extent | 743896 bytes | |
| dc.format.mimetype | application/pdf | |
| dc.language.iso | zh_TW | |
| dc.relation.ispartofseries | 1996 ICS會議 | |
| dc.subject.other | Microarchitecture and Parallelizing Compiler | |
| dc.title | Design and Implementation of a Parallelism Detector for CONVEX SPP-1000 System | |
| 分類: | 1996年 ICS 國際計算機會議 | |
文件中的檔案：
| 檔案 | 描述 | 大小 | 格式 | |
|---|---|---|---|---|
| ce07ics001996000207.pdf | 726.46 kB | Adobe PDF | 檢視/開啟 |
在 DSpace 系統中的文件，除了特別指名其著作權條款之外，均受到著作權保護，並且保留所有的權利。