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dc.contributor.authorLin, Kelvin
dc.contributor.authorLu, Neng-Pin
dc.contributor.authorMaa, Yeong-Chang
dc.contributor.authorChung, Chung-Ping
dc.date.accessioned2009-08-23T04:39:09Z
dc.date.accessioned2020-05-25T06:24:46Z-
dc.date.available2009-08-23T04:39:09Z
dc.date.available2020-05-25T06:24:46Z-
dc.date.issued2006-10-31T09:08:08Z
dc.date.submitted1996-12-19
dc.identifier.urihttp://dspace.lib.fcu.edu.tw/handle/2377/2936-
dc.description.abstractIn this paper, we designed a cache coherence protocol for clustered multiprocessors. This protocol combines the IEEE SCI cache coherence protocol [7] with Writhe-Once protocol [5]. To evaluate and verify this protocol, we implemented this protocol on the PROTEUS parallel-architecture simulation system [2]. In addition, we used the enhanced PROTEUS system to investigate the performance differentiation between clustered, bus-based, and network-based multiprocessor systems. Through simulations, we found that the performance of the clustered multiprocessor is the best on heavily memory-loaded benchmarks.
dc.description.sponsorship中山大學,高雄市
dc.format.extent8p.
dc.format.extent934116 bytes
dc.format.mimetypeapplication/pdf
dc.language.isozh_TW
dc.relation.ispartofseries1996 ICS會議
dc.subject.otherMultiprocessing and Parallel Processing
dc.titleEnhancing the SCI Cache Coherence Protocol for Multiprocessor Clusters
分類:1996年 ICS 國際計算機會議

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