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dc.contributor.authorLee, Liang-Teh
dc.contributor.authorHuang, Po-Hsian
dc.contributor.authorTao, Der-Fu
dc.date.accessioned2009-08-23T04:39:14Z
dc.date.accessioned2020-05-25T06:24:59Z-
dc.date.available2009-08-23T04:39:14Z
dc.date.available2020-05-25T06:24:59Z-
dc.date.issued2006-10-31T09:22:15Z
dc.date.submitted1996-12-19
dc.identifier.urihttp://dspace.lib.fcu.edu.tw/handle/2377/2962-
dc.description.abstractThis paper presents a new architecture of a high-speed switch which can be used for ATM. The switch, called TSM (Triangular Style Memory), uses Dual-Port eliminating the bus contention. With the same required throughput and cell loss probability, the performance analysis of the switch shows that the number of buffers and average cell delay can be significantly reduced in the proposed switch while comparing to the ATM switches with central shared memory.
dc.description.sponsorship中山大學,高雄市
dc.format.extent7p.
dc.format.extent854359 bytes
dc.format.mimetypeapplication/pdf
dc.language.isozh_TW
dc.relation.ispartofseries1996 ICS會議
dc.subject.otherSimulation and Performance Evaluation
dc.titleUsing Triangular Style Memory Architecture For High Speed Switch
分類:1996年 ICS 國際計算機會議

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