CRC-32 Verilog晶片模擬

Abstract

(1)目的 : 在數位通訊中，可能會因為各種原因導致資料在傳輸過程中或接收時發生錯誤，為了保證資料傳輸的可靠性和資料校驗的高效性，常常採用一些差錯控制方法。 迴圈冗餘校驗CRC (Cyclic Redundancy Code) 就是一種被廣泛採用的差錯控制方法和資料編碼方法。它具有編碼簡單，檢錯和糾錯能力強等特點，能有效地對資料進行編碼，並可以顯著地提高系統地檢錯能力，從而保證資料傳輸的可靠性和正確性，因此在大多數的乙太網路協定中都採用了CRC校驗來進行差錯控制。

(2)過程及方法 : 使用硬體描述語言Verilog HDL並在ModelSim 10.1c版本的編譯器來進行程式的模擬以及校驗。對CRC-16的串列傳輸/並列傳輸以及CRC-32的並列傳輸一一進行模擬

(3)結果 : 依據不同CRC的生成多項式以及不同的資料傳輸的方式，會影響檢錯能力和資料傳輸的正確性、可靠性。 根據不同的CRC生成多項式，CRC-16 應用在BM、SDLC等等；CRC-32應用在ZIP、RAR、IEEE802、LAN/FDD I、PPP-FCS等等，依據不同的傳輸方式，並列傳輸方式比串列傳輸方式更快速有效率但相對電路成本也會相對提高。

Abstract (1) Purpose: In digital communication, there has many reason cause the procedure of data transmission or receive happen mistake, in order to ensure the reliability of data transmission and the efficiency of data verify, it is often using error control. Cyclic Redundancy Code (CRC) is a widely using in error control and data encoding. It has easy encoding, the strong ability of error detection and error correction, can encode data effectively, and significantly improve the ability of system's error correction. Hence, in many Ethernet network protocols are using CRC for error control.

(2) Procedure and Method: It use hardware description language(HDL) Verilog and the compiler is in the version of ModelSim 10.1c for the purpose of simulation and verification. The simulation is for CRC-16 serial transmission/ parallel transmission and CRC-32 parallel transmission.

(3) Result: Accroding to different generator polynomial of CRC and different mode of data transmission, it can affect the ability of error detection and the correctness, reliability of data transmission. Under different generator polynomial of CRC, CRC-16 has the application of BM、SDLC and so on；CRC-32 has the application of ZIP、RAR、IEEE802、LAN/FDD I、PPP-FCS etc. Accroding to different type of transmission, the parallel transmission has better efficiency but the circuit cost also relative increase.