Cache Performance of Data Flow/Control Flow Architecture

Abstract

Instruction reference in data flow differs from that of conventional systems. In data flow environments, execution is data driven, hence it depends on data reference. Scheduled data flow is a unique architecture that uses a non-blocking multithread and decoupled access model based on data flow paradigm. The parallel nature found in data flow architectures and the dependence of execution on data cause the dimensional reference patterns more effective and complex than the conventional sequential execution. This research compares the cache performance of such hybrid architecture and the existing conventional architecture. By using non-blocking multithreaded model to divide the program into different code sections, data organizations and layouts provide an essential mechanism to improve the cache locality. Our evaluations, with several small benchmarks, demonstrate that the cache performance using different associativity -in most cases, significantly outperform conventional system.