Integrated System Architecture Synthesis of Distributed Embedded Systems for Multimedia Applications

Abstract

An integer linear programming (ILP) based approach incorporating with dynamic voltage scaling technique for integrated system architecture synthesis of embedded multimedia systems is presented in this paper. The approach maps each computation task of a particular application onto a system component with multiple supply voltages, schedules the execution of these computation tasks and communication time into pipeline stages, and generates communication topology simultaneously. The objective is to minimize the total hardware area and/or total power consumption subject to the throughput constraint on the pipelined system architecture.