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dc.contributor.authorChen, Chien
dc.contributor.authorHsu, Chia-Ren
dc.contributor.authorHuang, Chi-Chia
dc.contributor.authorChou, Chia-Sheng
dc.date.accessioned2009-08-23T04:42:34Z
dc.date.accessioned2020-05-25T06:51:59Z-
dc.date.available2009-08-23T04:42:34Z
dc.date.available2020-05-25T06:51:59Z-
dc.date.issued2007-01-29T07:19:33Z
dc.date.submitted2006-12-04
dc.identifier.urihttp://dspace.lib.fcu.edu.tw/handle/2377/3573-
dc.description.abstractIn order to support Internet security, virtual private networks, Quality of Service (QoS), etc., Internet routers need to classify incoming packets quickly into flows. Packet classification uses information contained in the packet header and a predefined rule table in the routers. In general, packet classification on multiple fields is a difficult problem. Hence, researchers have proposed a variety of algorithms. This paper presents a novel packet classification algorithm, called bit compression algorithm. Like the previously best known algorithm, bitmap intersection, bit compression is based on the multiple dimensional range lookup approach. Since bit vectors of the bitmap intersection contain lots of ‘0’ bits, the bit vectors could be compressed. We compress the bit vectors by preserving only useful information but removing the redundant bits of the bit vectors. An additional index table would be created to keep tract of the rule number associated with the remaining bits. Additionally, the wildcard rules also enable more extensive improvement in storage requirement. A novel Fast Boolean Expansion enable our scheme obtain much better classification speed even under large number of wildcard rules. Comparing with the bitmap intersection algorithm, the bit compression algorithm reduces the storage complexity in the average case from Ө(dN2) of bitmap intersection to Ө(dN·logN), where d denotes the number of dimensions and N represents the number of rules. With less memory requirement, the proposed scheme not only cut the cost of packet classification engine down, but also increases classification performance by accessing less memory which is the performance bottleneck in the packet classification engine implementation using a network processor.
dc.description.sponsorship元智大學,中壢市
dc.format.extent7p.
dc.format.extent676115 bytes
dc.format.mimetypeapplication/pdf
dc.language.isozh_TW
dc.relation.ispartofseries2006 ICS會議
dc.subject.otherBest Paper
dc.titleFast Packet Classification Using Bit Compression with Fast Boolean Expansion
分類:2006年 ICS 國際計算機會議

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