題名: | Object Oriented Network-On-Chip Modeling |
作者: | Chang, Chi-Fu Hsu, Yarsun |
關鍵字: | Network-on-chip NoC Design space |
期刊名/會議名稱: | 2010 ICS會議 |
摘要: | The design of a NoC simulator can significantly affect its ability to explore various design space and simulation accuracy. It’s not easy to achieve both wide-range design space exploration and detailed characterization of hardware components simultaneously. This paper presents a kind of NoC modeling in an object oriented flavor: object oriented NoC modeling (“OONoC” in brief). OONoC divides the NoC design space into many design blocks and each block into many abstraction levels. OONoC can extend the exploration space of NoC, study hardware characteristics, and significantly reduce the coding effort of a new NoC design. |
日期: | 2011-01-19T04:17:40Z |
分類: | 2010年 ICS 國際計算機會議(如需查看全文,請連結至IEEE Xplore網站) |
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