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dc.contributor.authorChen, Shian-De
dc.contributor.authorChen, Pei-Yin
dc.contributor.authorWang, Yung-Ming
dc.date.accessioned2009-06-02T08:41:31Z
dc.date.accessioned2020-07-05T06:32:05Z-
dc.date.available2009-06-02T08:41:31Z
dc.date.available2020-07-05T06:32:05Z-
dc.date.issued2006-06-15T03:00:47Z
dc.date.submitted2003-12-19
dc.identifier.urihttp://dspace.fcu.edu.tw/handle/2376/1784-
dc.description.abstractThe genetic algorithm (GA) can find an optimal solution in many complex problems. Therefore, it has been used widely in many applications. A flexible VLSI genetic algorithm processor is proposed in this paper. It can perform dynamically various fitness functions, four crossover operations, and over ten thousand kinds of mutation-rate settings to meet the requirements of different applications. Because of its features, the proposed processor is very suitable for various real-time applications. Finally, the proposed VLSI architecture is implemented on FPGA for verification.
dc.description.sponsorship逢甲大學,台中市
dc.format.extent5P.
dc.format.extent373068 bytes
dc.format.mimetypeapplication/pdf
dc.language.isozh_TW
dc.relation.ispartofseries中華民國92年全國計算機會議
dc.subjectGenetic Algorithm
dc.subjectFlexible design
dc.subjectTable-Look-Up Technique
dc.subjectGA
dc.subject.other其他領域
dc.titleA Flexible Genetic Algorithm Chip
分類:2003年 NCS 全國計算機會議

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