電梯控制系統

Abstract

中文摘要 本專題旨在利用 Verilog 硬體描述語言與 DE0 FPGA 開發板，設計並實作一套以有限狀態機（Finite State Machine, FSM）為核心的十樓電梯控制系統，藉此練習數位邏輯設計、狀態機控制及 FPGA 硬體實作，並解決電梯在不同樓層間移動、接收樓層需求及開關門控制等問題。系統以按鍵與指撥開關作為輸入，透過 Verilog 設計邊緣偵測、需求管理及排程等模組，將乘客的樓層需求記錄後交由排程模組決定電梯行進方向，再由 FSM 控制電梯的待機、上樓、下樓、開門、關門等狀態。同時，利用七段顯示器顯示目前樓層及相關運作資訊，使電梯運作狀態能夠即時呈現在 DE0 面板。電梯的樓層需求採用 LOOK 排程方式進行處理，使電梯在目前行進方向仍有需求時持續移動，當該方向沒有其他需求時再改變行進方向，以提升需求處理的合理性。經由 Verilog 程式設計、Quartus 編譯及 DE0 FPGA 開發板實際測試後，完成十樓電梯的基本控制功能，包括樓層需求記憶、上下樓移動、開關門控制、樓層顯示及多個樓層需求的依序處理。本專題實作結果顯示，利用 FSM 可有效將複雜的電梯控制流程轉換為明確的狀態與轉移條件，並能透過 FPGA 實際驗證數位電路設計，達到電梯控制系統實作與 FSM 應用練習之目的。

Abstract This project aims to design and implement a ten-floor elevator control system using the Verilog hardware description language and the DE0 FPGA development board, with the purpose of practicing digital logic design, finite state machine (FSM) control, and FPGA hardware implementation. The system uses push buttons and DIP switches as inputs. Through Verilog, modules for button debouncing, edge detection, request management, and scheduling are designed to record passengers’ floor requests. The scheduler then determines the elevator’s moving direction, while the FSM controls the elevator through different states, including idle, moving upward, moving downward, door opening, and door closing. A seven-segment display is also used to show the current floor and related operating information, allowing the elevator status to be monitored in real time. The floor requests are processed using the LOOK scheduling algorithm. The elevator continues moving in the current direction while there are remaining requests in that direction and changes direction when no further requests exist. After completing the Verilog design, Quartus compilation, and practical testing on the DE0 FPGA development board, the basic functions of the ten-floor elevator were successfully implemented, including floor request storage, upward and downward movement, door control, floor display, and sequential processing of multiple floor requests. The results demonstrate that an FSM can effectively convert the complex control procedures of an elevator into clearly defined states and transition conditions, while FPGA implementation provides practical verification of digital circuit design. This project therefore achieves the goals of implementing an elevator control system and gaining practical experience with FSM-based control.