完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Lee, Tse-Hao | |
dc.contributor.author | Chen, Chang-Jiu | |
dc.date.accessioned | 2009-08-23T04:46:46Z | |
dc.date.accessioned | 2020-05-29T06:18:46Z | - |
dc.date.available | 2009-08-23T04:46:46Z | |
dc.date.available | 2020-05-29T06:18:46Z | - |
dc.date.issued | 2006-10-13T02:37:28Z | |
dc.date.submitted | 2001-12-20 | |
dc.identifier.uri | http://dspace.fcu.edu.tw/handle/2377/1129 | - |
dc.description.abstract | Asynchronous processors have become a new direction of modern architecture research these years. To compare the improvement of different approaches without designing a real chip, we need a code-based simulator. The SimAsync, an asynchronous processor simulator was developed. The simulator tools are based on SimpleScalar[1], a public simulator of modern microprocessors. out that some problems, like branch miss penalty and data dependency, cannot be solved easily in asynchronous environment. The power dissipation reduction is not as good as expected, neither. Because the additional control logics between each stage also need power, the implementation of control logic should be more refined. On the other hand, | |
dc.description.sponsorship | 中國文化大學,台北市 | |
dc.format.extent | 12p. | |
dc.format.extent | 1301577 bytes | |
dc.format.mimetype | application/pdf | |
dc.language.iso | zh_TW | |
dc.relation.ispartofseries | 2001 NCS會議 | |
dc.subject | SimAsync | |
dc.subject | SimpleScalar | |
dc.subject | simulator | |
dc.subject | asynchronous | |
dc.subject.other | Advanced Microarchitecture | |
dc.title | An Asynchronous Processor Simulator | |
分類: | 2001年 NCS 全國計算機會議 |
文件中的檔案:
檔案 | 描述 | 大小 | 格式 | |
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ce07ncs002001000048.pdf | 1.27 MB | Adobe PDF | 檢視/開啟 |
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