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dc.contributor.authorChang, Yen-Hsiang
dc.contributor.authorLee, Yi-Hsuan
dc.contributor.authorChen, Cheng
dc.date.accessioned2009-08-23T04:41:17Z
dc.date.accessioned2020-05-25T06:37:56Z-
dc.date.available2009-08-23T04:41:17Z
dc.date.available2020-05-25T06:37:56Z-
dc.date.issued2006-10-16T03:41:09Z
dc.date.submitted2002-12-18
dc.identifier.urihttp://dspace.lib.fcu.edu.tw/handle/2377/1454-
dc.description.abstractWith the rapid evolution of submicron technology, manufacturers are integrating increasing numbers of components on one chip. Thus, the embedded multiprocessor System-on-Chip (SoC) system becomes one of the most attractive trends currently and in the future. By the limitation of portability and inexpensive packaging, SoC designers need an efficient scheduling technique to assign applications to the target realization while meeting both timing and power constraints. Genetic Algorithm (GA) is an appropriate scheduling method to solve this multi-objective problem. In general, GA can obtain the near-optimal solution but suffer from longer scheduling time. Hence, we propose two enhanced methods named Constrained Genetic Algorithm (CGA) and Partitioned Genetic Algorithm (PGA) to overcome this drawback. We also construct a simulation and evaluation environment to evaluate their performance. According to our experimental results, both CGA and PGA can not only obtain near-optimal solutions, but also dramatically decrease the scheduling time in comparison with standard GA.
dc.description.sponsorship東華大學,花蓮縣
dc.format.extent20p.
dc.format.extent295102 bytes
dc.format.mimetypeapplication/pdf
dc.language.isozh_TW
dc.relation.ispartofseries2002 ICS會議
dc.subjectGenetic Algorithm
dc.subjectEmbedded system
dc.subjectTask scheduling
dc.subjectPower consumption
dc.titleEnhanced Genetic Algorithms for Task Scheduling in an Embedded Multiprocessor System-on-Chip System
分類:2002年 ICS 國際計算機會議

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