完整後設資料紀錄
DC 欄位 | 值 | 語言 |
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dc.contributor.author | Lu, Chang-Chun | |
dc.contributor.author | Tsai, Shi-Chun | |
dc.date.accessioned | 2009-08-23T04:47:15Z | |
dc.date.accessioned | 2020-05-29T06:16:13Z | - |
dc.date.available | 2009-08-23T04:47:15Z | |
dc.date.available | 2020-05-29T06:16:13Z | - |
dc.date.issued | 2006-10-16T05:37:44Z | |
dc.date.submitted | 2001-12-20 | |
dc.identifier.uri | http://dspace.fcu.edu.tw/handle/2377/1557 | - |
dc.description.abstract | A writer stores some data in memory accessible via address lines. If an adversary permutes the address lines after the writer leaves the message, then how can a reader find the permutation? This is the so-called unscrambling address lines problem [1]. By generalizing the previous approach of Broder et al. [1], we give and analyze a new algorithm, which is parallelizable. We also consider an alternative version of the problem by assuming that the writer have the ability to write at the correct address without the effect of adversary. In this case, we give a very simple algorithm to identify the permutation. | |
dc.description.sponsorship | 中國文化大學,台北市 | |
dc.format.extent | 6p. | |
dc.format.extent | 146549 bytes | |
dc.format.mimetype | application/pdf | |
dc.language.iso | zh_TW | |
dc.relation.ispartofseries | 2001 NCS會議 | |
dc.subject | permutation | |
dc.subject | field programmable gate array | |
dc.subject | FPGA | |
dc.subject.other | Graph Theory and Algorithms | |
dc.title | More on Unscrambling Address Lines | |
分類: | 2001年 NCS 全國計算機會議 |
文件中的檔案:
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ce07ncs002001000016.pdf | 143.11 kB | Adobe PDF | 檢視/開啟 |
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