Using FPGA to Implement a Partial Reconfigurable Architecture of Embedded System

Abstract

With the advance of science and technology, information products be required with light and thin, hence how to design a system into a single chip become a trend, the embedded system is typical example. Today the specification of products are changeful and various. How to lengthen the product lifetime on the market and to obtain more profits becomes an important issue. Our paper proposes a partial reconfigurable architecture of embedded system, the system combine one major MPU (MicroProcessor Unit) and many reconfigurable function units. Utilize the characteristic of FPGA (Field Programmable Gate Array), we could reconfigure the function units according to demand for specific function and change the architecture of hardware to satisfy different kinds of application. In addition, it can also promote computing efficiency by hardware circuit. Therefore, this architecture probably becomes an optimized system between ASIC (Application Specific Integrated Circuit) and GPP (General-Purpose Processor).