A Pipelined Parallel Hardware Sorter

Abstract

A new hardware sorter which combines both Batcher's parallel merge sort [1] and Stodd's pipelined two way merge sort algorithm [2] is proposed in the paper. This hardware contains one k-sorter and ㏒(n/k) k-to-k mergers, and can sort n records in Ο(n/k) assuming data is retrieved through k parallel data paths. The internal processing algorithm and control unit of this pipelined parallel device have been completely designed. This sorter is readily suitable for VLSI Implementation, and can be used to process very large databases efficiently.