題名: | Hierarchical Interface Design Methodology: Using Real-Time MP3 codec as a case |
作者: | Jun-Sheng Zheng Shiau, Yeu-Horng Jou, Jer-Min |
關鍵字: | Hierarchical interface design methodology virtual component virtual component interface PVCI |
期刊名/會議名稱: | 2002 ICS會議 |
摘要: | In this paper a method for rapidly SoC IP interface design called hierarchical interface design method and models is proposed. The method is an interface design scheme that can be used to integrate different IPs easily. The main concept is to design IP and its interface separately. It introduces a virtual interface concept to simplify interface design. To verify the practicability, we use the hierarchical interface design model to implementation a real-time MP3 codec system. Finally a software /hardware co-simulation is done to verify the entire MP3 real-time codec system. Experiments show that the hierarchical interface design me thodology results in minor hardware overhead on the original design. Different IPs can integrate in this scheme to reduce time to market. |
日期: | 2006-10-23T15:34:03Z |
分類: | 2002年 ICS 國際計算機會議 |
文件中的檔案:
檔案 | 描述 | 大小 | 格式 | |
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ce07ics002002000269.PDF | 830.09 kB | Adobe PDF | 檢視/開啟 |
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