完整後設資料紀錄
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Kao, Jen-Hwa | |
dc.contributor.author | Ker, Jar-Shone | |
dc.contributor.author | Kuo, Yau-Hwang | |
dc.date.accessioned | 2009-08-23T04:39:19Z | |
dc.date.accessioned | 2020-05-25T06:25:18Z | - |
dc.date.available | 2009-08-23T04:39:19Z | |
dc.date.available | 2020-05-25T06:25:18Z | - |
dc.date.issued | 2006-10-25T01:08:01Z | |
dc.date.submitted | 1996-12-19 | |
dc.identifier.uri | http://dspace.lib.fcu.edu.tw/handle/2377/2422 | - |
dc.description.abstract | Color correction is a complex nonlinear function approximation problem. In this paper, we employ the inverse plant control model and CMAC neural network paradigm to solve this problem. Experimental results have revealed excellent effect and fast speed on color correction by using CMAC-based approach. To support real-time applications, a digital higher-order CMAC chip is developed. This chip adopts systolic structure to realize the weight address generator, based on a novel weight address calculation formula which con sharply reduce the required weight memory size. Besides, a fast B-spline receptive field evaluation method is proposed to compute the receptive field values for a recursive formula. To provide the function of dynamic weight adjustment, and on-chip learning module is also embedded into the CMAC chip. An FPGA-based add-on card has exhibited a performance faster than software approach about twenty-five times. | |
dc.description.sponsorship | 中山大學,高雄市 | |
dc.format.extent | 8p. | |
dc.format.extent | 1350012 bytes | |
dc.format.mimetype | application/pdf | |
dc.language.iso | zh_TW | |
dc.relation.ispartofseries | 1996 ICS會議 | |
dc.subject.other | Speech, Vision & Image Processing | |
dc.title | A Neural Network Chip for Color Correction | |
分類: | 1996年 ICS 國際計算機會議 |
文件中的檔案:
檔案 | 描述 | 大小 | 格式 | |
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ce07ics001996000082.pdf | 1.32 MB | Adobe PDF | 檢視/開啟 |
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