題名: | A Neural Network Chip for Color Correction |
作者: | Kao, Jen-Hwa Ker, Jar-Shone Kuo, Yau-Hwang |
期刊名/會議名稱: | 1996 ICS會議 |
摘要: | Color correction is a complex nonlinear function approximation problem. In this paper, we employ the inverse plant control model and CMAC neural network paradigm to solve this problem. Experimental results have revealed excellent effect and fast speed on color correction by using CMAC-based approach. To support real-time applications, a digital higher-order CMAC chip is developed. This chip adopts systolic structure to realize the weight address generator, based on a novel weight address calculation formula which con sharply reduce the required weight memory size. Besides, a fast B-spline receptive field evaluation method is proposed to compute the receptive field values for a recursive formula. To provide the function of dynamic weight adjustment, and on-chip learning module is also embedded into the CMAC chip. An FPGA-based add-on card has exhibited a performance faster than software approach about twenty-five times. |
日期: | 2006-10-25T01:08:01Z |
分類: | 1996年 ICS 國際計算機會議 |
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ce07ics001996000082.pdf | 1.32 MB | Adobe PDF | 檢視/開啟 |
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