題名: | Zero-deadspace Floorplanning for Soft Modules |
其他題名: | 應用於可變模組之零閒置平面規劃 |
作者: | 王, 建延 Jr 詹, 景裕 Jr 周, 典慶 Jr 黃, 元欣 Jr |
關鍵字: | Area optimization Scalability Tetris® Zero deadspace Heuristic approach Floorplanning |
期刊名/會議名稱: | NCS 2009 |
摘要: | Floorplanning is an important phase in physical design of VLSI. In this paper, a new efficient heuristic algorithm is presented to handle soft modules: LS (L-Shaped packing) , which is inspired by the game, Tetris®. The LS algorithm generates a zero- deadspace floorplan for a set of soft modules with a very strict aspect ratio constraint. The soft modules are clustered into a zone side by side and placed the zone to the partial floorplan. While attempting to grow from lower-left to upper-right, all the zone are packed to the floorplan. The packing seems to be an iterative L-Shape packing for each pair of zones. The experimental results are base on the standard MCNC and GSRC benchmarks. The resules demonstrate that the proposed algorithm can obtain a significant improvement both in the area and runtime, All the experiments are carried out on an Intel® 2.6 GB machine with 1 GB memory. Particularly, our methodology provides greater improvement over the other approaches. The results of LS on all benchmarks obtain zerodeadspace floorplans, and were completed within 1 second, under a strict aspect ratio of modules such as [0.5, 2]. The area utilization of the proposed model shows the superiority for solution quality, scalability and robustness. Consequently, it is also suitable to handle large scale floorplanning problems. |
日期: | 2011-03-24T19:55:11Z |
分類: | 2009年 NCS 全國計算機會議 |
文件中的檔案:
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CEV 1-2.pdf | 307.55 kB | Adobe PDF | 檢視/開啟 |
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