Hardware Based Routing Lookup for IPv4

Abstract

In this paper, consider the problem of organizing address tables for Internet routers to enable fast searching. Our proposal is to build an efficient, compact and easily searchable implementation of an IP routing table by using hardware. One limitation of router performance is the route lookup mechanism. IP routing requires that a router perform a longest-prefix-match address lookup for each incoming datagram in order to determine the datagram’s n ext hop. We present a route lookup mechanism that when implemented in a pipelined fashion in hardware, can achieve one or more routes lookup every memory access. With 50ns DRAM, this corresponds to approximately 20 million packets per second; this corresponds to a rate of more than 10 Gb/s per port. We also present promotion mechanism that can be done in the early one stage of the pipeline for the forwarding table in the hardware. The advantage of the promotion mechanism is made clear from the simulation of the five-levels hierarchy routing table distribution.