VLSI Implementation of CORDIC-Based Geometry Rotation for High-Speed 3-D Computer Graphic Systems

Abstract

High performance architectures for the applications of intensive data with constraints on latency can be achieved by maximizing both parallelism and pipelining. In this paper, the hardware primitives of 3-D geometry rotation based on the redundant CORDIC arithmetic are presented. The proposed CORDIC based architecture has been implemented by VLSI for high-throughput power-aware 3-D computer graphic systems. The overall performance of 3-D vector interpolation and rotation can be improved significantly by using the proposed architecture, in which only one CORDIC computation time is required.