Low-Complexity Bit-Parallel Systolic Montgomery Multipliers over GF(2m)

Abstract

Recently, cryptographic application based on fields GF(2m)have attracted much interest This article presents bit-parallel systolic Montgomery multipliers over GF(2m).The use of the transformation method to implement low-complexity Motgomery multipliers is proposed for all-one polynomials and trinomials .The presented multipliers have a latency m+1 clock cycles, and each cell incorporates at most one 2-input AND gate. two 2-input XOR gates and four 1-bit latches . In the multiplication in GF(2m). novel multipliers are shown to exhibit much significantly lower latency and circuit complexity than the related systolic multipliers. and are highly appropriate for VLST systems because of their regular interconnection pattern.modular structure and fully inherent parallelism.