題名: | Automating Formal Modular Verification of Asynchronous Real-Time Embedded Systems |
作者: | Hsiung, Pao-Ann Cheng, Shu-Yu |
關鍵字: | assume-guarantee reasoning modular verification model-checking state-space reduction techniques real-time embedded systems |
期刊名/會議名稱: | 2002 ICS會議 |
摘要: | Most verification tools and methodologies such as model checking, equivalence checking, hardware verification, software verification, and hardware-software coverification often flatten out the behavior of a target system before verification. Inherent modularities, either explicit or implicit, functional or structural, are not exploited by these tools and algorithms. In this work, we show how assume-guarantee reasoning (AGR) can be used for such exploitations by integrating AGR into a verification tool. Targeting at real-time embedded systems, we propose procedures to automatically generate assumptions, guarantees, and time constraints, which otherwise require manual efforts and human creativity. Through a complex but comprehensible realtime embedded system example such as a Vehicle Parking Management System (VPMS), we illustrate the feasibility of the AGR approach and the extremely large (as much as 96%) reduction possible in state-space sizes when AGR is applied. Due to AGR, we also found five errors in the VPMS design using much lesser CPU time and memory space than possible without AGR. |
日期: | 2006-10-13T08:13:20Z |
分類: | 2002年 ICS 國際計算機會議 |
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ce07ics002002000004.PDF | 146.26 kB | Adobe PDF | 檢視/開啟 |
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