ARRAY PROCESSOR WITH PARTITIONED MEMORY FOR HOUGH TRANSFORM-BASED CIRCLE DETECTION

Abstract

Circle detection through the use of Hough transform is usually time-consuming. In this paper, an idea of VLSI processor design for Hough transform-based circle detection is presented. In our design, we use multiple processors to generate candidate circle center addresses in parallel, while in each processor only adder operation is needed to determine the accumulator address. To match the speed of accumulator memory updating with parallel address generation, the accumulator memory is partitioned into modules for parallel accumulator update. With the number of memory modules chosen equal to the number of processors, an interleaving scheme for partitioning the circle template table and accumulator memory is proposed. It balances the load of processors and avoids accumulator memory contention. Variations of our design are presented and analyzed.