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符合的文件:
題名 | 作者 | 日期 |
---|---|---|
An FIFO Memory Design for 8-to-32 Data Exchange Bus | Wang, Chua-Chin; Tseng, Yih-Long; Chen, Yi-Wei | 2006-10-18T10:55:18Z |
A VLSI MULTIPROCESSOR SYSTEM FOR CIRCLE DETECTION: HARDWARE DESIGN AND LOAD DISTRIBUTION | Chern, Ming-Yang | 2006-10-18T10:47:12Z |
A Pipelined Parallel Hardware Sorter | Shu, Wen-Lung | 2006-10-18T10:55:55Z |
Robust Reference Clock Generator Design for DDR Synchronous Devices | Wang, Chua-Chin; Tseng, Yih-Long; Chen, Chi-Wen | 2006-10-18T10:56:21Z |
積體電路工業的新挑戰-GSI 系統晶片 | 吳全臨; 黃印璽; 蔡長委; 江尚旻; 饒書鈺; 許鈺鼎 | 2006-10-18T10:56:37Z |
Efficient Embeddings of Quadtrees and Pyramids in VLSI Arrays | 詹景裕; 呂紹偉; 李政宏 | 2006-10-18T10:56:54Z |